From 91c653dcb7d0d6d38714ef64e725aa9f1847255b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=D0=95=D0=B2=D0=B3=D0=B5=D0=BD=D0=B8=D0=B9=20=D0=9C=D0=BE?= =?UTF-8?q?=D0=B6=D0=B5=D0=B2=D0=B8=D1=82=D0=B8=D0=BD?= Date: Fri, 13 Sep 2024 11:43:41 +0300 Subject: [PATCH] =?UTF-8?q?=D0=B4=D0=BE=D0=B1=D0=B0=D0=B2=D0=BB=D0=B5?= =?UTF-8?q?=D0=BD=D1=8B=20=D0=BC=D0=BE=D0=B4=D0=B5=D0=BB=D0=B8?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- BDTIC/SZMM3Z5V6ST1G.LIB | 41 +++++++++++ DIOTEC/MMSZ5232B.ckt | 41 +++++++++++ NEXPERIA/BZX384-C5V1.ckt | 70 +++++++++++++++++++ NEXPERIA/BZX384-C5V6.mdl | 50 ++++++++++++++ NEXPERIA/BZX84-C5V1.mdl | 41 +++++++++++ NEXPERIA/BZX84-C5V6.mdl | 41 +++++++++++ TL431A.lib | 142 +++++++++++++++++++++++++++++++++++++++ 7 files changed, 426 insertions(+) create mode 100644 BDTIC/SZMM3Z5V6ST1G.LIB create mode 100644 DIOTEC/MMSZ5232B.ckt create mode 100644 NEXPERIA/BZX384-C5V1.ckt create mode 100644 NEXPERIA/BZX384-C5V6.mdl create mode 100644 NEXPERIA/BZX84-C5V1.mdl create mode 100644 NEXPERIA/BZX84-C5V6.mdl create mode 100644 TL431A.lib diff --git a/BDTIC/SZMM3Z5V6ST1G.LIB b/BDTIC/SZMM3Z5V6ST1G.LIB new file mode 100644 index 0000000..76b74e6 --- /dev/null +++ b/BDTIC/SZMM3Z5V6ST1G.LIB @@ -0,0 +1,41 @@ +.SUBCKT szmm3z5v6st1g 2 1 +************************************** +* Model Generated by MODPEX * +*Copyright(c) Symmetry Design Systems* +* All Rights Reserved * +* UNPUBLISHED LICENSED SOFTWARE * +* Contains Proprietary Information * +* Which is The Property of * +* SYMMETRY OR ITS LICENSORS * +*Commercial Use or Resale Restricted * +* by Symmetry License Agreement * +************************************** +* Model generated on Feb 22, 12 +* MODEL FORMAT: PSpice +* anode cathode +*node: 2 1 +* Forward Section +D1 2 1 MD1 +.MODEL MD1 D IS=1.98153e-10 N=1.6806 XTI=1 RS=2.2 ++ CJO=1.7e-10 TT=2e-09 +* Leakage Current +R 1 2 MDR 2e+09 +.MODEL MDR RES TC1=-0.0679198 TC2=0.00155388 +* Breakdown +IZG 4 2 0.0432 +R4 4 2 250 +D3 2 4 MD3 +.MODEL MD3 D IS=2.5e-12 N=0.476344 XTI=0 EG=0.1 +D2 5 4 MD2 +.MODEL MD2 D IS=2.5e-12 N=0.968597 XTI=0 EG=0.1 +EV1 1 5 6 0 1 +IBV 0 6 0.001 +RBV 6 0 MDRBV 5354.34 +.MODEL MDRBV RES TC1=0 +*-- PSpice DIODE MODEL DEFAULT PARAMETER +* VALUES ARE ASSUMED +*IS=1E-14 RS=0 N=1 TT=0 CJO=0 +*VJ=1 M=0.5 EG=1.11 XTI=3 FC=0.5 +*KF=0 AF=1 BV=inf IBV=1e-3 TNOM=27 +.ENDS szmm3z5v6st1g + diff --git a/DIOTEC/MMSZ5232B.ckt b/DIOTEC/MMSZ5232B.ckt new file mode 100644 index 0000000..0a48155 --- /dev/null +++ b/DIOTEC/MMSZ5232B.ckt @@ -0,0 +1,41 @@ +* SPICE model Zener diodes ***MMSZ5232B*** +* Use the symbol file ***mmsz5232b.asy*** +* +* (c) Diotec Semiconductor AG +* www.diotec.com +* 2022-01-26 +* +********************************************************* +* This model is for simulation purposes only. It does * +* not replace reviewing of the data sheet nor real life * +* testing of the part inside the application. * +********************************************************* +* +.subckt MMSZ5232B A K params: Vznom=5.6 Iztest=20m Vr=3 Ir=5u Rzj=11 Izmax=83m Cjo=220p + +* Above values are an example for the ***MMSZ5232B***. Using the +* above symbol file allows for direct insertion of other values +* according to these data sheet parameters: +* +* Vznom Nominal zener voltage at 25°C = (Vzmin+Vzmax)/2 +* Iztest Test current for Vz +* Vr Reverse voltage (minimum value) +* Ir Reverse current +* Rzj Dynamic resistance +* Izmax Max zener current +* Cjo Junction capacitance at 0V + +Dbr INT K Zbr +Df A K Zf +Dbl INT A DIObl + +* Zener breakdown characteristic +.model Zbr D(Is={Ir/10} N=2.0 Rs={Rzj} Bv={Vznom*(1+(temp-25)*0.001)} Ibv={Iztest} Eg=1.11 Xti=3 M=.33 diss={Vznom*Izmax}) +* +* Forward characteristic +.model Zf D(Is=100E-9 N=2.0 Rs=37m Cjo={Cjo} Eg=1.11 Xti=3 M=.33 Tt=800n) +* +* Internal blocking diode +.model DIObl D(Ron=.1m) + +.ends diff --git a/NEXPERIA/BZX384-C5V1.ckt b/NEXPERIA/BZX384-C5V1.ckt new file mode 100644 index 0000000..fb7606f --- /dev/null +++ b/NEXPERIA/BZX384-C5V1.ckt @@ -0,0 +1,70 @@ +* +******************************************* +* +*BZX384-C5V1 +* +*NXP Semiconductors +* +*Voltage regulator diode +* +* +* +* +* +*VFmax = 1,1V @ IF = 100mA +*IRmax = 2µA @ VR = 2V +* +*VZmax = 5,4V @ IZ = 5mA +* +* +* +* +* +* +* +*Package pinning does not match Spice model pinning. +*Package: SOD323 +* +*Package Pin 1: Cathode +*Package Pin 2: Anode +* +* +* +*Extraction date (week/year): 01/2016 +*Simulator: SPICE2 +* +******************************************* +*# +.SUBCKT BZX384-C5V1 1 2 + R1 1 2 1E+009 + D1 1 2 + + DIODE1 + D2 3 1 + + DIODE2 + VZ 2 3 0.0001 +* +*The resistor R1, the diode D2 +*and VZ do not reflect +*physical devices but improve +*only modeling in the reverse +*mode of operation. +* + .MODEL DIODE1 D + + IS = 1E-015 + + N = 1.035 + + BV = 5.3 + + IBV = 0.005 + + RS = 0.32 + + CJO = 1.21E-010 + + VJ = 0.8 + + M = 0.355 + + FC = 0.5 + + TT = 0 + + EG = 1.1 + + XTI = 3 + .MODEL DIODE2 D + + IS = 1E-009 + + N = 12.8 + + RS = 0.001 + .ENDS +* diff --git a/NEXPERIA/BZX384-C5V6.mdl b/NEXPERIA/BZX384-C5V6.mdl new file mode 100644 index 0000000..65b3447 --- /dev/null +++ b/NEXPERIA/BZX384-C5V6.mdl @@ -0,0 +1,50 @@ +* +******************************************* +* +*BZX384-C5V6 +* +*NXP Semiconductors +* +*Voltage regulator diode +* +* +* +* +* +* +*IR = 1µA @ VR = 2V +*IZSM = 6A @ tp = 100µs +*VZmax = 6V0 @ IZ = 5mA +* +* +* +* +* +* +* +*Package pinning does not match Spice model pinning. +*Package: SOD323 +* +*Package Pin 1: Cathode +*Package Pin 2: Anode +* +* +* +* +*Simulator: PSPICE +* +******************************************* +*# +.MODEL BZX384-C5V6 D ++ IS = 1.033E-15 ++ N = 1.001 ++ BV = 5.6 ++ IBV = 0.005 ++ RS = 0.387 ++ CJO = 1.961E-10 ++ VJ = 0.9187 ++ M = 0.423 ++ FC = 0.5 +*## +* + diff --git a/NEXPERIA/BZX84-C5V1.mdl b/NEXPERIA/BZX84-C5V1.mdl new file mode 100644 index 0000000..c9ebef0 --- /dev/null +++ b/NEXPERIA/BZX84-C5V1.mdl @@ -0,0 +1,41 @@ +*********************************************************** +* +* BZX84-C5V1 +* +* Nexperia +* +* Voltage regulator diodes +* VFmax = 0,9V @ IF = 10mA +* IRmax = 2µA @ VR = 2V +* VZmax = 5,4V @ IZ = 5mA +* IZSM = 6A @ tp = 100µs +* +* +* +* Package pinning does not match Spice model pinning. +* Package: SOT23 +* +* Package Pin 1: Anode +* Package Pin 2: Not Connected +* Package Pin 3: Cathode +* +* +* Extraction date (week/year): # +* Simulator: PSPICE +* +*********************************************************** +* +.MODEL BZX84-C5V1 D ++ IS=2.6665E-18 ++ N=.82284 ++ RS=.51617 ++ IKF=11.760E-3 ++ CJO=232.29E-12 ++ M=.35004 ++ VJ=.79587 ++ ISR=150.40E-12 ++ BV=5.1760 ++ IBV=.10454 ++ TT=43.858E-9 +.ENDS +* \ No newline at end of file diff --git a/NEXPERIA/BZX84-C5V6.mdl b/NEXPERIA/BZX84-C5V6.mdl new file mode 100644 index 0000000..3f6c446 --- /dev/null +++ b/NEXPERIA/BZX84-C5V6.mdl @@ -0,0 +1,41 @@ +*********************************************************** +* +* BZX84-C5V6 +* +* Nexperia +* +* Voltage regulator diodes +* VFmax = 0,9V @ IF = 10mA +* IRmax = 1µA @ VR = 2V +* VZmax = 6V @ IZ = 5mA +* IZSM = 6A @ tp = 100µs +* +* +* +* Package pinning does not match Spice model pinning. +* Package: SOT23 +* +* Package Pin 1: Anode +* Package Pin 2: Not Connected +* Package Pin 3: Cathode +* +* +* Extraction date (week/year): # +* Simulator: PSPICE +* +*********************************************************** +* +.MODEL BZX84-C5V6 D ++ IS=2.6665E-18 ++ N=.82284 ++ RS=.51617 ++ IKF=11.760E-3 ++ CJO=137.10E-12 ++ M=.34532 ++ VJ=.72637 ++ ISR=1.2666E-9 ++ BV=5.7078 ++ IBV=.35715 ++ TT=78.483E-9 +.ENDS +* \ No newline at end of file diff --git a/TL431A.lib b/TL431A.lib new file mode 100644 index 0000000..fcc9083 --- /dev/null +++ b/TL431A.lib @@ -0,0 +1,142 @@ +* TL431A_models.lib +* Models have been edited for LTspice syntax, but are otherwise per originals + +* Model developed by analogspiceman +************************************************** +.subckt TL431AS A K R ; Anode Kathode Reference +D1 R K Dc +R1 A R 1.3e6 tc1=3m +G1 A 5 R 4 1 +C1 5 A 1n Rpar=600 +D2 7 R Dc +D3 7 4 Dn +R2 7 4 950k +R3 6 5 600k +D4 A 6 Di +C2 K 6 40p Rser=5k Rpar=1e6 +G2 K 7 6 A 95m +D5 A 7 2V5 +D6 7 A Dk +C3 7 A 50p +D7 A K Dc +.model Dc d Ron=10 Vfwd=0.65 Vrev=36 Epsilon=50m +.model Dn d Is=1p Kf=0p2 Cjo=0p3 +.model Di d Ron=10m epsilon=1m +.model Dk d Ron=5k7 Vfwd=0.8 Epsilon=0.5 +.model 2V5 d Ron=27m Vfwd=0.6 Epsilon=10m Vrev={Vr} revEpsilon=10m +.param Vr=2.5+dt*(95u-dt*2u6) dt=temp-10 +.ends TL431AS + +* Model developed by Eugene Dvoskin +************************************************** +.subckt TL431ED A K R ; Anode Kathode Reference +Q1 K R 5 0 QN_ED +Q7 3 3 1 0 QP_ED +D1 A 4 D_ED +Q8 4 3 2 0 QP_ED +R4 5 9 3k28 +R2 9 12 2k4 +R3 9 10 7k2 +R1 14 A 800 +R5 6 11 4k +R7 K 1 800 +R8 K 2 800 +R6 13 12 1k +R9 8 7 150 +R10 8 A 10k +D2 A K D_ED +C1 K 4 10p +C2 10 11 20p +Q2 12 12 A 0 QN_ED area=1.2 +Q3 10 12 14 0 QN_ED area=2.2 +Q5 11 10 A 0 QN_ED +Q9 K 4 7 0 QN_ED +Q10 K 8 A 0 QN_ED area=5 +Q4 3 5 6 0 QN_ED +Q6 4 13 A 0 QN_ED area=0.5 +Q11 4 4 R 0 QN_ED +.model QN_ED npn(Bf=140 Cje=1p Cjc=2p Rb=40 Vaf=80 Var=50 Kf=3.2e-16 Af=1) +.model QP_ED pnp(Bf= 60 Cje=1p Cjc=3p Rb=80 Vaf=70 Var=40) +.model D_ED d(Rs=5 Cjo=4p) +.ends TL431ED + +* Model developed by Helmut Sennewald 6/27/2004 +* This TL431 model has been developed from the schematic in the datasheet. +* It agrees with most of the test circuits and covers Tempco, C-load stability, +* AC gain, reverse diode, noise, transient, Zout. +************************************************** +.subckt TL431AH A K R ; Anode Kathode Reference +Q1 3 2 1 0 NPN1 2.7 +Q2 2 2 A 0 NPN1 1 +R1 1 A 800 TC1=350u ; This TC1 does the trick for the total tempco +R2 4 2 2k4 +R3 4 3 7k2 +R4 5 4 3k28 +Q3 6 3 A 0 NPN1 1 +R5 7 6 4k +Q4 10 5 7 0 NPN1 1 +Q5 K R 5 0 NPN1 1 +R6 2 12 1k +Q6 11 12 A 0 NPN1 0.2 +Q9 K 11 13 0 NPN1 2 +Q10 K 14 A 0 NPN1 10 +R10 14 A 10k +R9 13 14 150 +R7 K 8 800 +Q7 10 10 8 0 PNP1 1 +Q8 11 10 9 0 PNP1 1 +D2 A K D1 +D1 A 11 D3 +R8 K 9 800 +C1 K 11 20p +C2 6 3 20p +D3 11 R D2 +* adjust output voltage with Is +.MODEL NPN1 npn(Is= 8f Bf=100 Vaf=100 Tf=0n5 IKF=10m Kf=1e-16 Af=1 Rb=50 Re=10) +.MODEL PNP1 pnp(Is=10f Bf= 50 Vaf= 50 Tf=10n IKF= 2m Kf=1e-16 Af=1) +.MODEL D1 d(Is=0p1 Rs=10 Cjo=20p) +.MODEL D2 d(Is=0p1 Rs=10 Cjo= 2p Bv=5 Ibv=10u) +.MODEL D3 d(Is=0p1 Rs=10 Cjo= 2p) +.ends TL431AH + +* Released by: Analog eLab Design Center, Texas Instruments Inc. +* Part: TL431 +* Date: 12/14/2009 +* Model Type: Transient and AC +************************************************** +.subckt TL431A A K R ; Anode Kathode Reference +V1 1 A 2.495 +R1 A 2 15.6 +C1 2 A 0u5 +R2 2 3 100 +C2 3 4 80n +R3 4 A 10 +GB1 A 8 Value = {if(V(3,A)<0, 1.73*V(3,A)-1u, -1u)} +D1 5 8 Dclamp +D2 K 8 Dclamp +V4 5 A 2 +G1 A 2 1 R 0.11 +.model Dclamp d (Is=13n5 Rs=25m N=1.59 Cjo=45p Vj=0.75 M=302m Tt=50n4 Bv=34 Ibv=1m) +.ends TL431A + +************************************************** +* TL431 MACROMODEL 3-26-92 +* REV N/A DBB +************************************************** +.subckt TL431X A K R ; Anode Kathode Reference +V1 3 4 1.4 +I1 A 1 1m +R1 R A 1.2e6 +R2 1 A Rmod 2495 +R3 2 4 0.2 +D1 K 3 Dmod1 +D2 A K Dmod1 +D3 A 4 Dmod2 +E1 2 A Poly(2) (1,A) (R,A) 0 710 -710 +.model Rmod res (TC1=14u TC2=-1u) +.model Dmod1 d (Rs=0.3) +.model Dmod2 d (Rs=1u) +.ends TL431X + + +